| Title | Designing via-configurable logic blocks for regular fabric |
| Publication Type | Journal Article |
| Year of Publication | 2006 |
| Authors | Ran, Y, Marek-Sadowska, M |
| Journal | Very Large Scale Integration (VLSI) Systems, IEEE Transactions on |
| Volume | 14 |
| Pagination | 1 -14 |
| Date Published | jan. |
| ISSN | 1063-8210 |
| Keywords | application specific integrated circuits, CMOS logic circuits, CMOS static cells, gate arrays, general-purpose fabric, logic arrays, logic design, M1-M2 via mask, power consumption, regular fabric, structured ASIC, via-configurable functional cell, via-configurable inverter arrays, via-configurable logic block |
| Abstract | In this paper, we describe the design process of a via-configurable logic block for regular fabric. The block consists of a via-configurable functional cell and two via-configurable inverter arrays. A via-configurable functional cell can efficiently implement most commonly used CMOS static cells, and a via-configurable inverter array is efficient in implementing inverters, repeaters, and some pass-transistor logic. The cells have prefabricated transistors, contacts, and M1 wires. The M2 mask is fixed. All of the functions can be realized by customizing only an M1-M2 via mask. We construct a general-purpose fabric based on the via-configurable block and show its great flexibility in implementing a variety of functions. Compared to other fabrics based on look-up tables or programmable logic arrays, our fabric has much higher performance, smaller area, and lower power consumption. |
| DOI | 10.1109/TVLSI.2005.863196 |
