Delay-fault diagnosis using timing information

TitleDelay-fault diagnosis using timing information
Publication TypeJournal Article
Year of Publication2005
AuthorsWang, Z, Marek-Sadowska, M, Tsai, K-H, Rajski, J
JournalComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Pagination1315 - 1325
Date Publishedsept.
Keywordscircuit analysis computing, circuit timing information, delay defect size, delay testing, delay window propagation, delay-fault diagnosis, delays, DWP, error correction, failure analysis, fault diagnosis, fault simulation, logic simulation, logic testing, timing analysis, timing errors, timing failures, timing faults, timing jitter
AbstractIn modern technologies, process variations can be quite substantial, often causing design timing failures. It is essential that those errors be correctly and quickly diagnosed. Unfortunately, the resolution of the existing delay-fault diagnostic methodologies is still unsatisfactory. In this paper, the feasibility of using the circuit timing information to guide the delay-fault diagnosis is investigated. A novel and efficient diagnostic approach based on the delay window propagation (DWP) is proposed to achieve significantly better diagnostic results than those of an existing delay-fault diagnostic commercial tool. Besides locating the source of the timing errors, for each identified candidate the proposed method determines the most probable delay defect size. The experimental results indicate that the new method diagnoses timing faults with very good resolution.