Potential slack budgeting with clock skew optimization

TitlePotential slack budgeting with clock skew optimization
Publication TypeConference Paper
Year of Publication2004
AuthorsWang, K, Marek-Sadowska, M
Conference NameComputer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
Date Publishedoct.
Keywordscircuit optimisation, clock skew optimization, linear programming, logic circuits, potential slack budgeting
AbstractPotential slack is an effective metric of circuit's possible performance improvement. It is equal to the maximal amount of slack that can be potentially used for optimization. In this paper, we first present a new, linear programming-based approach for potential slack calculation. Our method produces an optimal solution with significant runtime speedup compared to previous methods. Then, we formulate and solve the problem of global potential slack budgeting by clock-skew optimization. We demonstrate experimentally that the potential slack can be significantly improved by appropriate clock skew assignment.