Title | A crosstalk aware two-pin net router |
Publication Type | Conference Paper |
Year of Publication | 2003 |
Authors | Hsiao, M-F, Marek-Sadowska, M, Chen, S-J |
Conference Name | Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on |
Date Published | may |
Keywords | circuit layout CAD, circuit optimisation, constrained region graph, critical net, crosstalk aware two-pin net router, data structure, graph theory, integrated circuit layout, network routing, optimal solution, special net routing, timing critical nets, two-pin connection, VLSI |
Abstract | In this paper we describe a crosstalk aware router, which can be applied to special net routing, such as clock, and other timing critical nets. The router uses a new data structure called constrained region graph which represents the necessary information. We developed a novel algorithm to solve the minimal crosstalk routing problem. We also prove that given a layout, and a two-pin connection of a critical net to be laid out, our algorithm can always obtain the optimal solution. |
DOI | 10.1109/ISCAS.2003.1206325 |