Found 10 results
Filters: Keyword is integrated circuit reliability  [Clear All Filters]
Conference Paper
A. Todri, Marek-Sadowska, M., and Chang, S. - C., Analysis and optimization of power-gated ICs with multiple power gating configurations, in Computer-Aided Design, 2007. ICCAD 2007. IEEE/ACM International Conference on, 2007, pp. 783 -790.
Y. Ran and Marek-Sadowska, M., Crosstalk noise in FPGAs, in Design Automation Conference, 2003. Proceedings, 2003, pp. 944 - 949.
V. Mehta, Wang, Z., Marek-Sadowska, M., Tsai, K. - H., and Rajski, J., Delay fault diagnosis for nonrobust test, in Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on, 2006, p. 8 pp. -472.
F. Chen, Mittl, S., Shinosky, M., Swift, A., Kontra, R., Anderson, B., Aitken, J., Wang, Y., Kinser, E., Kumar, M., Wang, Y., Kane, T., Feng, K. D., Henson, W. K., Mocuta, D., and Li, Di-an, Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues, in Reliability Physics Symposium (IRPS), 2012 IEEE International, 2012, pp. 6A.4.1 -6A.4.9.
C. - W. Chang, Wang, K., and Marek-Sadowska, M., Layout-driven hot-carrier degradation minimization using logic restructuring techniques, in Design Automation Conference, 2001. Proceedings, 2001, pp. 97 - 102.
K. Wang and Marek-Sadowska, M., On-chip power supply network optimization using multigrid-based technique, in Design Automation Conference, 2003. Proceedings, 2003, pp. 113 - 118.
A. Todri, Marek-Sadowska, M., and Kozhaya, J., Power supply noise aware workload assignment for multi-core systems, in Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference on, 2008, pp. 330 -337.
K. Wang and Marek-Sadowska, M., Power/ground mesh area optimization using multigrid-based technique [IC design], in Design, Automation and Test in Europe Conference and Exhibition, 2003, 2003, pp. 850 - 855.
Journal Article
C. - W. Chang, Hsiao, M. - F., Hu, B., Wang, K., Marek-Sadowska, M., Cheng, C. - K., and Chen, S. - J., Fast postplacement optimization using functional symmetries, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 23, pp. 102 - 118, 2004.
A. Todri and Marek-Sadowska, M., Reliability Analysis and Optimization of Power-Gated ICs, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, pp. 457 -468, 2011.