Publications
Found 25 results
Filters: First Letter Of Last Name is S [Clear All Filters]
, “Capturing input switching dependency in crosstalk noise modeling”, in ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 2000, pp. 330 -334.
, “Circuit clustering using graph coloring”, in ISPD '99: Proceedings of the 1999 international symposium on Physical design, 1999, pp. 164–169.
, “The crossing distribution problem”, in Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on, 1991, pp. 528 -531.
, “The crossing distribution problem [IC layout]”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 14, pp. 423 -433, 1995.
, “Detecting context sensitive hot spots in standard cell libraries”, in Design for Manufacturability through Design-Process Integration III, 2009, vol. 7275, p. 727515.
, “Efficient circuit clustering for area and power reduction in FPGAs”, ACM Trans. Des. Autom. Electron. Syst., vol. 7, pp. 643–663, 2002.
, “Efficient circuit clustering for area and power reduction in FPGAs”, in FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays, 2002, pp. 59–66.
, “An Efficient Mechanism for Performance Optimization of Variable-Latency Designs”, in Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE, 2007, pp. 976 -981.
, “Fast post-placement rewiring using easily detectable functional symmetries”, in Design Automation Conference, 2000. Proceedings 2000. 37th, 2000, pp. 286 -289.
, “FPGA interconnect planning”, in SLIP '02: Proceedings of the 2002 international workshop on System-level interconnect prediction, 2002, pp. 23–30.
, “A global routing technique for wave-steered design methodology”, in Digital Systems, Design, 2001. Proceedings. Euromicro Symposium on, 2001, pp. 430 -436.
, “Interconnect complexity-aware FPGA placement using Rent's rule”, in SLIP '01: Proceedings of the 2001 international workshop on System-level interconnect prediction, 2001, pp. 115–121.
, “Interconnect pipelining in a throughput-intensive FPGA architecture”, in FPGA '01: Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays, 2001, pp. 153–160.
, “Interconnect resource-aware placement for hierarchical FPGAs”, in Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on, 2001, pp. 132 -136.
, “Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues”, in Reliability Physics Symposium (IRPS), 2012 IEEE International, 2012, pp. 6A.4.1 -6A.4.9.
, “Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues”, in Reliability Physics Symposium (IRPS), 2012 IEEE International, 2012, pp. 6A.4.1 -6A.4.9.
, “Latency and latch count minimization in wave steered circuits”, in Design Automation Conference, 2001. Proceedings, 2001, pp. 383 - 388.
, “A novel high throughput reconfigurable FPGA architecture”, in FPGA '00: Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays, 2000, pp. 22–29.
, “Performance Optimization Using Variable-Latency Design Style”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, pp. 1874 -1883, 2011.
, “Pipelining sequential circuits with wave steering”, Computers, IEEE Transactions on, vol. 53, pp. 1205 - 1210, 2004.
, “PITIA: an FPGA for throughput-intensive applications”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 11, pp. 354 -363, 2003.
, “Twin gate, vertical slit FET (VeSFET) for highly periodic layout and 3D integration”, in Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference, 2011, pp. 145 -150.
, “Twin gate, vertical slit FET (VeSFET) for highly periodic layout and 3D integration”, in Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference, 2011, pp. 145 -150.
, “Wave steered FSMs”, in Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings, 2000, pp. 270 -276.
, “Wave steering in YADDs: a novel non-iterative synthesis and layout technique”, in Design Automation Conference, 1999. Proceedings. 36th, 1999, pp. 466 -471.
